? semiconductor components industries, llc, 2006 january, 2006 ? rev. 1 1 publication order number: NUP4102XV6/d NUP4102XV6 6?pin bi?directional quad tvs array this 6?pin bi?directional transient suppressor array is designed for applications requiring transient overvoltage protection capability. it is intended for use in transient voltage and esd sensitive equipment such as computers, printers, cell phones, medical equipment, and other applications. its integrated design provides bi?directional protection for four separate lines using a single sot?563 package. this device is ideal for situations where board space is a premium. features ? bi?directional protection for four lines in a single sot?563 package ? peak power dissipation ? 75 w (8x20 sec waveform) ? low leakage current (100 na @ 12 v) ? low capacitance (< 15 pf) ? provides esd protection for jedec standards jesd22 ? machine model = class c ? human body model = class 3b ? provides esd protection for iec 61000?4?2, 15 kv (air), 8 kv (contact) mechanical characteristics ? void free, transfer?molded, thermosetting plastic case ? corrosion resistant finish, easily solderable ? package designed for optimal automated board assembly ? small package size for high density applications applications ? gsm handsets and accessories ? other telephone sets ? computers / printers / set?top boxes maximum ratings (t j =25 c, unless otherwise specified) rating symbol value unit peak power dissipation 8x20 sec double exponential waveform, (note 1) p pk 75 w operating junction temperature range t j ?40 to 125 c storage temperature range t stg ?55 to 150 c lead solder temperature ? maximum (10 sec) t l 260 c human body model ( hbm) machine model (mm) iec 61000?4?2 air (esd) iec 61000?4?2 contact (esd) esd 16 0.4 30 30 kv maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. non?repetitive current pulse per figure 3. 6 4 device package shipping ? ordering information NUP4102XV6t1g sot?563 (pb?free) 4000/tape & ree l 3 2, 5 1 sot?563 case 463a plastic rp = device marking m = one digit date code = pb?free package (note: microdot may be in either location ) marking diagram rp m 64 3 12 5 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. http://onsemi.com
NUP4102XV6 http://onsemi.com 2 electrical characteristics (t j =25 c, unless otherwise specified) parameter conditions symbol min typ max unit reverse working voltage (note 2) v rwm 12 v breakdown voltage i t = 1 ma, (note 3) v br 13.6 17.8 v reverse leakage current v rwm = 12 v i r 10 100 na clamping voltage i pp = 3 a, (8x20 sec waveform) v c 25 v maximum peak pulse current 8x20 sec waveform i pp 3.0 a capacitance v r = 0 v, f=1 mhz (line to gnd) c j 13 15 pf 2. tvs devices are normally selected according to the working peak reverse voltage (v rwm ), which should be equal or greater than the dc or continuous peak operating voltage level. 3. v br is measured at pulse test current i t ; pulse width 1 ms. typical performance curves (t j = 25 c unless otherwise specified) figure 1. pulse waveform t, time ( s) 30 15 10 5 0 percent of i pp 25 20 90 80 70 60 50 40 30 20 10 0 100 110 waveform parameters t r = 8 s t d = 20 s t d = i pp /2 c?t t a , ambient temperature ( c) 15 0 125 100 75 50 25 0 90 80 70 60 50 40 30 20 10 0 100 110 % of rated power or i pp figure 2. power derating curve 0 2 4 6 8 10 12 14 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 v br , reverse voltage (v) 12 14 16 18 20 22 24 0.1 1 10 v clamp , clamping voltage (v) figure 3. clamping voltage vs. peak pulse current (10 sec square wave pulse) figure 4. junction capacitance vs. reverse voltage i pp , surge current (a) t p = 10 sec t a = 25 c junction capacitance (pf)
NUP4102XV6 http://onsemi.com 3 package dimensions sot?563, 6?lead case 463a?01 issue o g m 0.08 (0.003) x d 6 5 pl c j ?x? ?y? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. dim a min max min max inches 1.50 1.70 0.059 0.067 millimeters b 1.10 1.30 0.043 0.051 c 0.50 0.60 0.020 0.024 d 0.17 0.27 0.007 0.011 g 0.50 bsc 0.020 bsc j 0.08 0.18 0.003 0.007 k s a b y 12 3 4 5 s k 0.004 0.012 0.059 0.067 0.10 0.30 1.50 1.70 6 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 NUP4102XV6/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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